| CMSIS-DSP Verison 1.4.1 CMSIS DSP Software Library

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Change Log

Version 1.4.1 2013/02/20

Updated licenses in headers to 2013

Fixed ALIGN4 macro in arm_math.h

Added files to Cortex-M0 projects so that all projects have same file list

Fixed bugs in

- arm_biquad_cascade_d2fT_f32.c
- arm_cfft_radix2_q31
- arm_cfft_radix2_f32
- arm_math.h (arm_pid functions)
- arm_iir_lattice_q31.c

Version 1.4.0 2013/01/09

Updated with more optimizations, bug fixes and new license information in headers

Optimized functions:

- arm_biquad_cascade_df2T_f32
- arm_biquad_cascade_df1_q31
- arm_fir_f32
- arm_fir_fast_q31
- arm_cfft_f32
- arm_cfft_radix2_q31
- arm_rfft_fast_f32 (new function)

Fixed compiler warnings in arm_math.h for comparing signed and unsigned ints

Fixed a saturation bug in arm_rms_q15

Simplified the code in arm_sin_cos_q31

Added a preprocessor directive to treat the Cortex M0+ just like the Cortex M0

The following functions were deprecated and will be removed in a future version

- arm_cfft_radix2_f32
- arm_cfft_radix2_init_f32
- arm_cfft_radix4_f32
- arm_cfft_radix4_init_f32

Version 1.3.0

Added CMSIS DSP Software Library

The CMSIS DSP Software Library is a suite of common signal processing functions targeted to Cortex-M processor based microcontrollers. Even though the code has been specifically optimized towards using the extended DSP instruction set of the Cortex-M4 processor, the library can be compiled for any Cortex-M processor.

For more information please see CMSIS DSP Library documentation. Added Cortex-M4 Core Support

Additional folder CM4, containing the Cortex-M4 core support files, has been added. CM0 CM3 CM4 CoreSupport DeviceSupport

New naming for Core Support Files

The new Core Support Files are:

- core_cm#.h (# = 0, 3, 4)
- core_cmFunc.h (Cortex-M Core Register access functions)
- core_cmInstr.h (Cortex-M Core instructions)
- core_cm4_simd.h (Cortex-M4 SIMD instructions)

Version 1.2.0

Removed CMSIS Middelware packages

CMSIS Middleware is on hold from ARM side until a agreement between all CMSIS partners is found. SystemFrequency renamed to SystemCoreClock

The variable name SystemCoreClock is more precise than SystemFrequency because the variable holds the clock value at which the core is running. Changed startup concept

The old startup concept (calling SystemInit_ExtMemCtl from startup file and calling SystemInit from main) has the weakness that it does not work for controllers which need a already configuerd clock system to configure the external memory controller.

Changed startup concept

- SystemInit() is called from startup file before premain.
- SystemInit() configures the clock system and also configures an existing external memory controller.
- SystemInit() must not use global variables.
- SystemCoreClock is initialized with a correct predefined value.
- Additional function void SystemCoreClockUpdate (void) is provided.
- SystemCoreClockUpdate() updates the variable SystemCoreClock and must be called whenever the core clock is changed.
- SystemCoreClockUpdate() evaluates the clock register settings and calculates the current core clock.

Advanced Debug Functions

ITM communication channel is only capable for OUT direction. To allow also communication for IN direction a simple concept is provided.

- Global variable volatile int ITM_RxBuffer used for IN data.
- Function int ITM_CheckChar (void) checks if a new character is available.
- Function int ITM_ReceiveChar (void) retrieves the new character.

For detailed explanation see file CMSIS debug support.htm.

Core Register Bit Definitions

Files core_cm3.h and core_cm0.h contain now bit definitions for Core Registers. The name for the defines correspond with the Cortex-M Technical Reference Manual.

e.g. SysTick structure with bit definitions

typedef struct
{
__IO uint32_t CTRL;
__IO uint32_t LOAD;
__IO uint32_t VAL;
__I uint32_t CALIB;
} SysTick_Type;
/* SysTick Control / Status Register Definitions */
#define SysTick_CTRL_COUNTFLAG_Pos 16
#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos)
#define SysTick_CTRL_CLKSOURCE_Pos 2
#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos)
#define SysTick_CTRL_TICKINT_Pos 1
#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos)
#define SysTick_CTRL_ENABLE_Pos 0
#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos)
/* SysTick Reload Register Definitions */
#define SysTick_LOAD_RELOAD_Pos 0
#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos)
/* SysTick Current Register Definitions */
#define SysTick_VAL_CURRENT_Pos 0
#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)
/* SysTick Calibration Register Definitions */
#define SysTick_CALIB_NOREF_Pos 31
#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos)
#define SysTick_CALIB_SKEW_Pos 30
#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos)
#define SysTick_CALIB_TENMS_Pos 0
#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos)
/* end of group CMSIS_CM3_SysTick */

DoxyGen Tags

DoxyGen tags in files core_cm3.[c,h] and core_cm0.[c,h] are reworked to create proper documentation using DoxyGen. Folder Structure

The folder structure is changed to differentiate the single support packages.

    CM0
    CM3
        CoreSupport
        DeviceSupport
            Vendor
                Device
                    Startup
                        Toolchain
                        Toolchain
                        ...
                Device
                ...
            Vendor
            ...
        Example (optional)
            Toolchain
                Device
                Device
                ...
            Toolchain
            ...
    Documentation

Version 1.1.0 2012/02/15

Updated with more optimizations, bug fixes and minor API changes.

Version 1.0.11 2011/10/18

Bug Fix in conv, correlation, partial convolution.

Version 1.0.10 2011/7/15

Big Endian support added and Merged M0 and M3/M4 Source code.

Version 1.0.3 2010/11/29

Re-organized the CMSIS folders and updated documentation.

Version 1.0.2 2010/11/11

Documentation updated.

Version 1.0.1 2010/10/05

Production release and review comments incorporated.

Version 1.0.0 2010/09/20

Production release and review comments incorporated.

Version 0.0.9 2010/08/27

Added files: arm_biquad_cascade_df1_fast_q15.c arm_biquad_cascade_df1_fast_q31.c arm_fir_fast_q31.c arm_fir_fast_q15.c

Version 0.0.7 2010/06/10

Misra-C changes done

Version 0.0.5 2010/04/26

incorporated review comments and updated with latest CMSIS layer

Version 0.0.3 2010/03/10 DP

Initial version